Three-dimensional memories, including memories fabricated with cells having antifuse layers, have been described in several prior art publications. Such publications include U.S. Pat. Nos. 5,835,396; 6,034,882; and PCT/US01/13575, filed Apr. 25, 2001.
In the process of fabricating three-dimensional memories, improvements to the cells have been discovered which enhance the cells"" performance and manufacturability.
A memory cell for use in a three-dimensional memory having a plurality of such cells disposed at several levels above a substrate is disclosed. Each cell includes a first region of a first conductivity type doped to a level of at least 1xc3x971020 atoms cmxe2x88x923. A second region of a second conductivity type is also used. An antifuse region is disposed between the first and second regions such that when the antifuse region is breached, a diode is formed. This occurs when the cell is programmed. In one embodiment, the very heavily doped first conductivity type region is a P type region, and the second region is an N type region doped to a level of approximately 1xc3x971017 atoms cmxe2x88x923.